1. Field
The embodiments discussed herein relate to a semiconductor memory.
2. Description of Related Art
As transistors are manufactured using finer design rules, a power supply voltage that is supplied to a semiconductor memory is decreased. Accordingly, variations in the electric characteristics of the transistors such as variations in the threshold voltages of the transistors in a static memory cells occur due to a manufacturing processes of the transistors. The variations in the electric characteristics of the transistors lead to instability of operations of the memory cells, and the yield of the semiconductor memories is reduced.
In order to avoid the aforementioned variations in the electric characteristics of the transistors in the memory cells, a method for adjusting a high-level voltage of a word line in accordance with the electric characteristics of transistors in memory cells is disclosed, for example, in Japanese Laid-Open Patent Publication No. 2007-66493. Further, a word driver having a latch function for avoiding a malfunction that is caused by noise of address signals is disclosed, for example, in Japanese Laid-Open Patent Publication No. H8-36881.